Bluespec(TM): a language to raise the level of ASIC design

When: 
Thursday, September 19, 2002 - 7:00pm
Room: 
8th fl
Lecturer(s): 
Rishiyur S. Nikhil

Sandburst is a new fab-less semiconductor company currently building chips for 10Gb/s MAN and Data Center routers. A central component of the company's strategy is to exploit a methodology for ASIC design that will reduce time to market for chips implementing complex algorithms, using a new language called Bluespec (TM). The core innovation in Bluespec consists of using Term Rewriting Systems for hardware description and synthesis, an approach pioneered by James Hoe and Prof. Arvind at MIT. At Sandburst, the language has been designed and implemented by Lennart Augustsson to exploit the powerful type system and abstraction mechanisms of the declarative programming language Haskell. The clean semantics of Bluespec also facilitate formal verification and systematic stepwise refinement via program transformation.

In this talk I will outline how and why Bluespec improves ASIC design flow (compared with a traditional Verilog-based flow, for example) by giving examples of the language and its compilation, and describing how it enables hierarchical design of ASICs with millions of gates.

(This is joint work with the Bluespec group at Sandburst.)

(IEEE Computer Society is co-sponsoring this program.)

After the talk, there will be a pay-your-own dinner at a local Cambridge restaurant.

Lecturer Biography: 

Rishiyur S. Nikhil has been at Sandburst Corporation since September 2000, where he directs a group developing and encouraging the use of Bluespec (TM), Sandburst's new language for ASIC design and verification. Previously, he spent 9 years at the Cambridge Research Laboratory (CRL) of Digital Equipment Corporation/Compaq, including a brief stint as Acting Director. Earlier, he was an Associate Professor of Computer Science and Engineering at MIT. His interests cover functional programming, dataflow and multithreaded architectures, parallel processing and, most recently, high-level languages for ASIC systems design. He has numerous publications in research journals and conferences. He received his Ph.D. degree in Computer and Information Sciences from the University of Pennsylvania.

He is a member of the ACM, IEEE, and IFIP Working Group 2.8 on Functional Programming.